1. Field of the Invention
The present invention relates generally to chalcogenide memories and, more particularly, to thin film phase-change memories.
2. Description of the Related Art
Chalcogenide phase-change memories are not easily driven by CMOS circuits. The chemical compounds known as chalcogenides generally require relatively high currents (or, more specifically, current densities) before undergoing a change of phase. Reducing the cross-sectional area of the chalcogenide or electrode can reduce the current requirement directly. Many structures have been proposed to reduce area, for example, by fabricating an ultra small contact and placing the chalcogenide into the contact. However, these efforts can be limited by lithography. Furthermore, it can be difficult to place materials into ultra small holes.
Wolstenholme, et al. (U.S. Pat. No. 6,111,264, entitled “Small pores defined by a disposable internal spacer for use in chalcogenide memories”) and Reinberg (U.S. Pat. No. 6,189,582, entitled “Small electrode for a chalcogenide switching device and method for fabricating same,”) describe processes of lithographically implementing several small holes (also called “pores” or “ultra small pores”). To the extent pores with reduced pore sizes are possible, a shrinking ratio of such pores is not unlimited since, for example, overhanging dielectric material may seal the hole when the hole is made too small. Therefore, the pore size can be limited by lithography. Accordingly, the pore size can be difficult to scale down. Also, the size uniformity of the ultra small pores can be difficult to control. Moreover, as previously alluded, it can be difficult to place chalcogenide into the holes.
Harshfield (U.S. Pat. No. 6,031,287, entitled “Contact structure and memory element incorporating the same,”) and Zahorik (U.S. Pat. No. 6,114,713, entitled “Integrated circuit memory cell having a small active area and method of forming same”) describe electrode areas that can be reduced, but the shrinking ratio can be limited by the film thickness. For example, if pore diameter is 0.15 um and film thickness is 200 Å, the shrinkage ratio is only approximately 50%. Therefore, the pore size is basically limited by lithography and can be scaled down only with difficulty. Additionally, the phase change region may depart from the electrode. Therefore, the ON/OFF ratio may not be as large as expected. The electrode may be very weak because the current flow in the electrode is very high. Thus, the electrode can limit the current. Accordingly, processes wherein photo/thin film techniques define the cross-sectional area of chalcogenide are not without shortcomings.
A need exists in the prior art for a phase change that can easily be driven by a CMOS circuit. A further need exists for a phase change memory having a reduced cross-sectional area that can reduce the current requirement directly.